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The 23rd International Technical Conference on Circuits/Systems, Computers and Communications

Session E4  Neural Networks 1
Time: 9:00 - 10:30 Tuesday, July 8, 2008
Location: 8F 802 Room
Chairs: Patcharee Chantanabupha (Univ. of Thai Chamber of Commerce, Thailand), Atsushi Ohta (Aichi Prefectural Univ., Japan)

E4-1 (Time: 9:00 - 9:18)
TitleMultiple-Valued Logic Clock Converter Networks
Author*Ali Massoud Haidar, Nawar El Ahdab (Beirut Arab Univ., Lebanon), Hiroyuki Shirahama (Ehime Univ., Japan), Ali Alaeldine (Grand Ecole D’Ingénieurs Généralistes en Electronique, Informatique, Télécoms et Réseaux, France)
Pagepp. 589 - 592
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E4-2 (Time: 9:18 - 9:36)
TitleA Novel Neural Network Ternary Arithmetic Logic Unit
Author*Ali Massoud Haidar, Mohammad Jad Hamdan, Mohammad Backer Rashid, Hassan A. Hamieh, Ahmad A. Issa (Beirut Arab Univ., Lebanon), Abdallah Kassem (Notre Dame Univ., Lebanon)
Pagepp. 593 - 596
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E4-3 (Time: 9:36 - 9:54)
TitleLow-Power CMOS CNN Cell and its Application to an Oscillatory CNN
Author*Hisashi Tanaka, Koichi Tanno, Hiroki Tamura, Kenji Murao (Univ. of Miyazaki, Japan)
Pagepp. 597 - 600
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E4-4 (Time: 9:54 - 10:12)
TitleNetwork on Chips Structure for Mapping Two Hidden Layers BP-ANNs
Author*Yiping Dong, Takahiro Watanabe (Waseda Univ., Japan)
Pagepp. 601 - 604
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E4-5 (Time: 10:12 - 10:30)
TitleAdaptive Noise Reduction Filter for Speech Using Cascaded Sandglass-type Neural Network
Author*Hiroki Yoshimura, Tadaaki Shimizu (Tottori Univ., Japan), Toshie Matumura (Nara National College, Japan), Masaya Kimoto (Tottori Univ., Japan), Naoki Isu (Mie Univ., Japan)
Pagepp. 605 - 608
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