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The 23rd International Technical Conference on Circuits/Systems, Computers and Communications

Session E1  Test Technology
Time: 11:00 - 12:12 Monday, July 7, 2008
Location: 8F 802 Room
Chairs: Yuichi Nakamura (NEC, Japan), Rardchawadee Silapunt (King Mongkut Univ. of Tech., Thailand)

E1-1 (Time: 11:00 - 11:18)
TitleOpen Lead Detection Based on Logical Change Caused by AC Voltage Signal Stimulus
Author*Akira Ono (Takuma National College of Tech., Japan), Masahiro Ichimiya, Hiroyuki Yotsuyanagi (Univ. of Tokushima, Japan), Masao Takagi (Takuma National College of Tech., Japan), Masaki Hashizume (Univ. of Tokushima, Japan)
Pagepp. 241 - 244
Detailed information (abstract, keywords, etc)

E1-2 (Time: 11:18 - 11:36)
TitleFlexible Multi-IP Verification Methodology Based on an FPGA Platform
Author*Jin Woo Song, Ki-Seok Chung (Hanyang Univ., Republic of Korea)
Pagepp. 245 - 248
Detailed information (abstract, keywords, etc)

E1-3 (Time: 11:36 - 11:54)
TitleFault Analysis of Interconnect Opens in 90nm CMOS ICs with Device Simulator
Author*Masaki Hashizume, Yuichi Yamada, Hiroyuki Yotsuyanagi (Univ. of Tokushima, Japan), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ., Japan), Yoshinobu Higami, Hiroshi Takahashi, Yuzo Takamatsu (Ehime Univ., Japan)
Pagepp. 249 - 252
Detailed information (abstract, keywords, etc)

E1-4 (Time: 11:54 - 12:12)
TitleVirtual ARM Simulation Platform for Embedded System Developers
AuthorAlex Heunhe Han, *Young-Ho Ahn, Ki-Seok Chung (Hanyang Univ., Republic of Korea)
Pagepp. 253 - 256
Detailed information (abstract, keywords, etc)