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The 23rd International Technical Conference on Circuits/Systems, Computers and Communications

Session D5  VLSI Design & Applications 5
Time: 13:00 - 13:54 Tuesday, July 8, 2008
Location: 8F 801 Room
Chairs: Wonjong Kim (ETRI, Republic of Korea), Takahiro Watanabe (Waseda Univ., Japan)

D5-2 (Time: 13:00 - 13:18)
TitleGain Based Delay Balancing in the Deep Submicron Era
Author*Ryusuke Egawa (Tohoku Univ., Japan), Jubee Tada (Yamagata Univ., Japan), Hiroaki Kobayashi (Tohoku Univ., Japan), Gensuke Goto (Yamagata Univ., Japan)
Pagepp. 577 - 580
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D5-3 (Time: 13:18 - 13:36)
TitleDesign of an ADALINE Adaptive Filter Based Noise Cancellation Based on Fine-grained Pipelines
Author*Nattha Jindapetch, Pornchai Phukpattaranont, Krerkchai Thongnoo (Prince of Songkla Univ., Thailand)
Pagepp. 581 - 584
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D5-5 (Time: 13:36 - 13:54)
TitleAn Efficient Implementation of Multi-channel H.264 Decoder SoC
Author*Wonjong Kim, Juneyoung Chang, Hanjin Cho (ETRI, Republic of Korea)
Pagepp. 585 - 588
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