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The 23rd International Technical Conference on Circuits/Systems, Computers and Communications

Session D1  VLSI Design & Applications 1
Time: 11:00 - 12:30 Monday, July 7, 2008
Location: 8F 801 Room
Chairs: Kimiyoshi Usami (Shibaura Inst. of Tech., Japan), Chi-Ho Lin (Semyung Univ., Republic of Korea)

D1-1 (Time: 11:00 - 11:18)
TitleHigh-Performance Architecture of Transform Circuit for Multi-standard Video CODEC
Author*Seonyoung Lee, Kyeongsoon Cho (Hankuk Univ. of Foreign Studies, Republic of Korea)
Pagepp. 181 - 184
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D1-2 (Time: 11:18 - 11:36)
TitleA New Implementation of Multilevel Framework for Interconnect-Driven Floorplanning
Author*Zheng Xu, Song Chen, Takeshi Yoshimura (Waseda Univ., Japan), Yong Fang (Shanghai Univ.., China)
Pagepp. 185 - 188
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D1-3 (Time: 11:36 - 11:54)
TitleDesign of Application Specific Processor and Compiler for H.264 CAVLC Decoding
Author*Jae-Jin Lee, Jun-Young Lee, MooKyoung Jeong, SeongMo Park, NakWoong Eum (ETRI, Republic of Korea)
Pagepp. 189 - 192
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D1-4 (Time: 11:54 - 12:12)
TitleA Power-Saving 1GBPS Irregular LDPC Decoder based on High-Efficiency Message-Passing
AuthorWenming Tang, *Wen Ji, Xianghui Wei, Takeshi Ikenaga, Satoshi Goto (Waseda Univ., Japan)
Pagepp. 193 - 196
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D1-5 (Time: 12:12 - 12:30)
TitleA Design Method of Finding Optimal Sampling Pulses and Transistor Sizes in a Sampling Circuit for Liquid Crystal Displays
Author*Shingo Takahashi, Shuji Tsukiyama (Chuo Univ., Japan), Masanori Hashimoto (Osaka Univ., Japan), Isao Shirakawa (Univ. of Hyogo, Japan)
Pagepp. 197 - 200
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