(Back to Session Schedule)

The 21st Asia and South Pacific Design Automation Conference

Session 8A  Emerging Networks-on-Chip Designs
Time: 15:50 - 17:30 Thursday, January 28, 2016
Location: TF4203
Chairs: Mehdi Tahoori (Karlsruhe Inst. of Tech., Germany), Chun-Yi Lee (National Tsing Hua Univ., Taiwan)

8A-1 (Time: 15:50 - 16:15)
TitleA High Performance Reliable NoC Router
Author*Lu Wang, Sheng Ma, Zhiying Wang (National Univ. of Defense Tech., China)
Pagepp. 712 - 718
Detailed information (abstract, keywords, etc)

8A-2 (Time: 16:15 - 16:40)
TitleDynamic Admission Control for Real-Time Networks-On-Chips
Author*Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst (TU Braunschweig, Germany)
Pagepp. 719 - 724
Detailed information (abstract, keywords, etc)

8A-3 (Time: 16:40 - 17:05)
TitleFoToNoC: A Hierarchical Management Strategy Based on Folded Torus-Like Network-on-Chip for Dark Silicon Many-Core Systems
Author*Lei Yang, Weichen Liu, Weiwen Jiang, Mengquan Li, Juan Yi, Edwin Hsing-Mean Sha (Chongqing Univ., China)
Pagepp. 725 - 730
Detailed information (abstract, keywords, etc)

8A-4 (Time: 17:05 - 17:30)
TitleAnalytical ThruChip Inductive Coupling Channel Design Optimization
Author*Li-Chung Hsu, Junichiro Kadomoto, So Hasegawa, Atsutake Kosuge, Yasuhiro Take, Tadahiro Kuroda (Keio Univ., Japan)
Pagepp. 731 - 736
Detailed information (abstract, keywords, etc)