(Back to Session Schedule)

International Workshop on
DIELECTRIC THIN FILMS FOR FUTURE ULSI DEVICES: SCIENCE AND TECHNOLOGY

Session S4  High-k/Metal Gate -2
Time: 10:50 - 12:20 Thursday, November 6, 2008
Chairs: Toshihide Nabatame (Selete, Japan), Byoung Hun Lee (SEMATECH, United States)

S4-1 (Time: 10:50 - 11:20)
Title(Invited Paper) High-k/Metal Gate CMOS Technology for 32 nm Generation and Beyond
Author*Mariko Takayanagi (Toshiba America Electronic Components, Inc., United States)
Pagepp. 69 - 70

S4-2 (Time: 11:20 - 11:40)
TitleImpacts of Composition in Ternary La-Al-O Films on Vfb for Application to Dual-High-k Gate Dielectric Technology
Author*Masamichi Suzuki, Masato Koyama, Atsuhiro Kinoshita (Toshiba Corp., Japan)
Pagepp. 71 - 72

S4-3 (Time: 11:40 - 12:00)
TitleElectrical Characterization of La2O3-Gated MOSFET with Mg Incorporation
Author*Tomotsune Koyanagi, Kiichi Tachi, Kouichi Okamoto, Kuniyuki Kakushima, Parhat Ahmet, Kazuo Tsutsui, Nobuyuki Sugii, Takeo Hattori, Hiroshi Iwai (Tokyo Inst. of Tech., Japan)
Pagepp. 73 - 74

S4-4 (Time: 12:00 - 12:20)
TitleXPS Study of TiAlN/HfSiON Gate Stack - Impact of Al Redistribution on Effective Work Function Change -
Author*Akio Ohta, Taiki Mori, Hiromichi Yoshinaga, Hideki Murakami, Seiichi Miyazaki (Hiroshima Univ., Japan), Masaru Kadoshima, Yasuo Nara (Selete, Japan)
Pagepp. 75 - 76