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International Workshop on
DIELECTRIC THIN FILMS FOR FUTURE ULSI DEVICES: SCIENCE AND TECHNOLOGY

Session S1  High-k/Metal Gate -1
Time: 13:20 - 14:50 Wednesday, November 5, 2008
Chairs: Masaaki Niwa (Panasonic, Japan), Sangjin Hyun (Samsung Electronics, Republic of Korea)

S1-1 (Time: 13:20 - 13:50)
Title(Invited Paper) Reliability Characterization of Metal Electrode/High-k Dielectric Stacks for the 45nm Node and Beyond
Author*Byoung Hun Lee, G. Bersuker, D. Heh, H. Park, C. Y. Kang, C. Young, H. Tseng, R. Jammy (SEMATECH, United States)
Pagepp. 5 - 6

S1-2 (Time: 13:50 - 14:10)
TitleThermal Stability and Size Scalability of Metastable Cubic Phase HfO2 with k=50
Author*Shinji Migita (MIRAI-ASRC, AIST, Japan), Yukimune Watanabe (MIRAI-ASET, Japan), Hiroyuki Ota (MIRAI-ASRC, AIST, Japan), Toshihide Nabatame (MIRAI-ASET, Japan), Akira Toriumi (MIRAI-ASRC, AIST/Univ. of Tokyo, Japan)
Pagepp. 7 - 8

S1-3 (Time: 14:10 - 14:30)
TitleFurther EOT Scaling below 0.4 nm for High-k Gated MOSFET
Author*Kuniyuki Kakushima, Koichi Okamoto, Kiichi Tachi, Parhat Ahmet, Kazuo Tsutsui, Nobuyuki Sugii, Takeo Hattori, Hiroshi Iwai (Tokyo Inst. of Tech., Japan)
Pagepp. 9 - 10

S1-4 (Time: 14:30 - 14:50)
TitleImportance of Ge-Friendly High-k Material Selection for Ge MIS Gate Dielectrics
Author*Toshiyuki Tabata, Choong Hyun Lee, Koji Kita, Akira Toriumi (Univ. of Tokyo, Japan)
Pagepp. 11 - 12