| Title | Low-Power 12-bit 160-MS/s Pipeline A/D Converters |
| Author | *Mai Nozawa, Daisuke Kurose, Takeshi Ueno, Tetsuro Itakura (Corporate Research & Development Center, Toshiba Corporation, Japan) |
| Page | pp. 409 - 412 |
| Keyword | pipeline, A/D converter, low-power, Class-AB, level shifter |
| Abstract | Low-power 12-bit 160-MS/s pipeline A/D converters are designed for wireless receivers. Instead of using ultra-deep submicron devices of low supply voltage, we employ analog-option devices that operate at supply voltage of 2.5V in a 90-nm CMOS process. To achieve lower power dissipation, an I/Q amplifier sharing technique is employed. Furthermore, charge transfer level shifters are proposed in S/H circuits and MDACs for realizing class-AB operation.
The area is 1.1mm2, the simulated power dissipation is 75mW/channel and the simulated ENOB is 11.15bit. |
| Title | Low-Voltage and High-CMRR Differential Amplifier Using FG-MOSFET's |
| Author | Koichi Tanno, Naotsugu Horita, Hisashi Tanaka, *Ryoichi Miyauchi, Hiroki Tamura (University of Miyazaki, Japan) |
| Page | pp. 413 - 416 |
| Keyword | differential amplifier, low-voltage, high-CMRR, analog integrated circuit |
| Abstract | In this paper, low-voltage and high-CMRR differential amplifier using two-input floating-gate MOSFET's is presented. In the proposed amplifier, the disadvantages of Monsurro's amplifier are removed. The HSPICE simulations demonstrate a common-mode gain of -59.5dB and a differential gain of 16.2dB with VDD=1.4V. And the chip area was 131um X 101um from the mask layout design. |
| Title | A Neuron MOS Current Mirror with a Transimpedance Amplifier |
| Author | *Akio Shimizu, Sumio Fukai (Saga University, Japan), Yohei Ishikawa (Ariake National College of Technology, Japan) |
| Page | pp. 421 - 424 |
| Keyword | current mirror, neuron MOS, transimpedance amplifier |
| Abstract | In this paper, we proposed a neuron MOS current mirror with a transimpedance amplifier. The conventional circuit is composed of a voltage amplifier and resistances. However, the resistance voltage drop makes operating range narrow. The proposed circuit is composed of the transimpedance amplifier. And the proposed circuit will be high current copy accuracy and wide operating range. Simulation results show that the proposed circuit has better current copy accuracy without the resistances, and low voltage operation. |
| Title | A Power-Efficient Voltage Up-Converting Circuit System |
| Author | *Won-Ji Lee, Kyoung-Su Lee, Jong-Min Baek (Department of Electrical and Computer Engineering, Sungkyunkwan University, Republic of Korea), Jung-Hyun Song (School of Information and Communication Engineering, Sungkyunkwan University, Republic of Korea), Jae-Chul Park (Department of Electrical and Computer Engineering, Sungkyunkwan University, Republic of Korea), Kee-Won Kwon (School of Information and Communication Engineering, Sungkyunkwan University, Republic of Korea) |
| Page | pp. 425 - 428 |
| Keyword | level shifter, charge pump, level detector, high voltage, up converter |
| Abstract | We developed a low-power voltage upconverter
system that is composed of charge pump, level
detector, and level shifter, which generates 1.0uA-10V
from 2.5V VDD using 0.18um CMOS technology. The
efficiency of the Dickson's charge pump was analysed with
respect to the size of pumping capacitors and the number of
pumping stages, and the optimum condition was chosen
from the analysis results. The level detector senses VPP
voltage in capacitive division way in order to eliminate the
steady state VPP power dissipation through the resistive
voltage divider. The power consumption in level shifters is
reduced without sacrificing the switching speed by inserting
a bootstrapped p-MOSFET between cross-coupled p-
MOSFET and pull down n-MOSFET. Combing the three
techniques the power consumption of voltage up-converting
circuit system is saved by 28%. |