| Title | Interface Development for Web-based Instruction Set Simulator |
| Author | *Hideaki Yanagisawa (Tokuyama College of Technology, Japan), Minoru Uehara, Hideki Mori (Toyo University, Japan) |
| Page | pp. 389 - 392 |
| Keyword | instruction set simulator, processor development environment, Ajax, HW/SW codesign |
| Abstract | HW/SW codesign tools are necessary to develop new processors in a short period of time, because both the hardware and a software development environment need to be designed for the new processor.
We have therefore develped C-DASH, a HW/SW codesign tool for designing processors. In addition, we have developed SSC-DASH (Server-Side C-DASH), which provides a web-based interface enabling processor designers to use C-DASH on the web.
This paper describes the interface development for a web-based instruction set simulator in a web-based processor development environment. |
| Title | Video Proxy Server Management Policy using Virtual Caching Technique |
| Author | *Jun Pyo Lee, Sung Han Park (Hanyang University, Republic of Korea) |
| Page | pp. 393 - 396 |
| Keyword | proxy server, virtual caching, multimedia streaming, media segmentation |
| Abstract | Due to the limited storage space in video proxy server, it is often required to replace the old video data which is not serviced for long time with the newly requested video. This replacement causes the service delay and increase of network traffic. To circumvent this problem, we present a virtual caching technique in video proxy server. |
| Title | Formal Verification of Web Navigation by Symbolic Model Checking |
| Author | *Hisashi Miyazaki, Tomoyuki Yokogawa, Kouichi Seko, Yoichiro Sato, Michiyoshi Hayase (Okayama Prefectural University, Japan) |
| Page | pp. 397 - 400 |
| Keyword | symbolic model checking, UML, statechart, web navigation |
| Abstract | Previously, it is general that users navigate from a web page to the other by clicking on a hyperlink. Recently web pages become dynamic with a variety of scripts and embedded client side programs. Such pages with dynamic navigation have a more complicated structure, so it is difficult to model and analyze.
In this paper, we present a method to verify systems which have dynamic web navigation. For this purpose, we model the navigation using a UML statechart diagram and translate the model to a boolean expression. Thus it becomes possible to verify the systems formally using symbolic model checking.
To demonstrate the proposed method, we apply the method to a system with dynamic web navigation and model-check the system using symbolic model checking tool called NuSMV. As a result, we verified reachability to all pages of the system. |
| Title | Implementation and Analysis of Win32 Native Distributed Compilation System - WinDistcc |
| Author | *Kyongjin Jo (School of Electrical Engineering, Korea University, Republic of Korea), Kwanghoon Choi (Mobile handset R&D center, LG Electronics, Republic of Korea), Jongkook Kim, Seon Wook Kim (School of Electrical Engineering, Korea University, Republic of Korea) |
| Page | pp. 401 - 404 |
| Keyword | Distributed compiler, remote preprocessing, distcc |
| Abstract | Many software vendors are suffering from heavy compilation overload because the size of their software product is getting bigger and
bigger. One of the promising solutions to reduce the compilation time is to use a distributed compiler. It allows us to compile multiple files on several machines concurrently.
However most of distributed compilers can't deliver
ideal performance due to many undesired overheads such as communication overhead,
lack of resources, load imbalance, file dependence, and so on. In order to study the detailed performance matrices,
we developed the Win32 prototype of a distributed compiler based on distcc (GNU distributed compiler), called WinDistcc.
WinDistcc contains additional features based on
distcc's basic functions. The compiler supports two kinds of compilation modes:
a local preprocessing or a remote preprocessing. We measured
the performances in both cases and identify reasons of performance
degradation in normal distributed compilers.
Based on the performance study,
we could understand the design requirement for ideal distributed compilers. |
| Title | Development of Compiler which Supports High-level Programming Language for Dynamic Reconfigurable Architecture DS-HIE |
| Author | *Yasuhiro Nishinaga, Takuro Uchida, Tetsuya Zuyama, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City University, Japan) |
| Page | pp. 405 - 408 |
| Keyword | dynamic reconfigurable processor, DS-HIE, compiler, C language, COINS |
| Abstract | We have developed the dynamic reconfigurable processor DS-HIE for the streaming processing in our laboratory. The software development environment for the DS-HIE processor was not developed. Therefore, this paper explains about the development of the compiler for the DS-HIE processor, which supports high-level programming language. The applications to evaluate the compiler were one dimensional DCT and row processing of LDCP decoding. As a compilation result, the average usage of the function unit was 83% |