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The 23rd International Technical Conference on Circuits/Systems, Computers and Communications

Session G2  Signal Processing 2
Time: 13:30 - 15:00 Monday, July 7, 2008
Location: 8F 804 Room
Chairs: Yegui Xiao (Prefectural University of Hiroshima, Japan), Piya Kovintavewat (Nakorn Pathom Rajaphat University, Thailand)

G2-1 (Time: 13:30 - 13:48)
TitleAn Interface based on Switched-Capacitor Sample/Hold circuit of Differential Capacitance Transducers
Author*Satomi Ogawa, Takuya Tanigawa, Daisuke Adachi (Yonago National College of Technology, Japan)
Pagepp. 353 - 356
Keyworddifferential capacitance transducer, switched-capacitor circuit, CMOS analog integrated circuit, sample/hold circuit
AbstractFor high-accuracy and high-speed signal processing of differential capacitance transducers, an interface circuitry based on a switched-capacitor sample/hold circuit using unity-gain buffer (UGB) is developed. The interface produces the output voltage which is proportional to the ratio of difference-to-sum of two capacitors of a differential transducer using only single reference voltage, Vr. Hspice simulations are described to predict performances of the interface when implemented by 0.35μm n-well CMOS process. Experimental results using discrete components are also given to confirm the principles of operation.

G2-2 (Time: 13:48 - 14:06)
TitleThree-Dimensional Phase Boundary Estimation in Sedimentation Process using Electrical Impedance Tomography with the Aid of Unscented Kalman Filter
AuthorAnil Kumar Khambampati, Ahmar Rashid, Jeong Seong Lee, Sin Kim, *Kyung Youn Kim (Cheju National University, Republic of Korea)
Pagepp. 357 - 360
KeywordSedimentation monitoring, Electrical impedance tomography , unscented Kalman filter, Boundary estimation
AbstractThis work is related to interfacial phase bounadry estimation in sedimentation monitoring using electrical impedance tomography. The fluid is assumed to settle into three different phases separated by sharp interfacial boundary. The time evolution of the phase interface gives important information about the sedimentation process which can be used to control and optimize the sedimentation process. Phase interface location and their corresponding conductivities estimation is treated as a stochastic nonlinear state estimation problem with the nonstationary interfacial phase boundary (state) being estimated online with the aid of unscented Kalman filter. Numerical experiments are performed to evaluate the performance of the proposed approach and is compared with conventional extended Kalman filter.

G2-3 (Time: 14:06 - 14:24)
TitleA Consideration of Noise Cancellation by using PCA-ICA Method with Delay Estimation
Author*Toshiaki Yokoda, Mohammad Reza Alsharif, Mahdi Khosravy (University of the Ryukyus, Japan)
Pagepp. 361 - 364
KeywordPCA, ICA, noise cancellation, delay estimation, cross correlation
AbstractThe noise cancellation technologies are useful for speech recognition and other applications. There are some kind of methods for cancellation of background noise. In this paper, The desired signals are separated from background noise by using proposed PCA-ICA method (Principal Component Analysis, Independent Component Analysis). The proposed PCA-ICA method requires several number of observed signals that is, the same as the number of sources. The noise signal can be removed in the same way as BSS (Blind Source Separation). We have done experiments (two-observation one-source one-noise, with delay) and evaluated the results.

G2-4 (Time: 14:24 - 14:42)
TitleProposal of a Hardware Task Engine To Improve Realtime of an Interrupt Handling
Author*Yoshitaka Kashiwagi (YASKAWA Electric Corporation, Japan), Noriyoshi Yamauchi (Waseda University, Japan)
Pagepp. 365 - 368
Keywordhardware task, realtime, dynamic reconfigurable hardware, magnetic encoder
AbstractIn this paper, hardware called a hardware task engine is proposed to achieve embedded controller architecture. It works highly realtime, because it has high-speed and flexible processing ability, and it reduces start up delay from interrupt. Start up delay from interrupt signal of a hardware task is 41.60 nanoseconds, and it is faster than software by 3.0 times, and temperature rise is reduced to 13.4%. As a result, we can corroborate availability of it.

G2-5 (Time: 14:42 - 15:00)
TitleDART for Adjacent Current Pattern in Electrical Impedance Tomography
Author*Jae-Hyoung Kim, Chan Yong Kim, Min Seong Kim, Bong-Yeol Choi (Kyungpook National University, Republic of Korea), Sin Kim, Jeong Seong Lee, Kyung Youn Kim (Cheju National University, Republic of Korea)
Pagepp. 369 - 372
KeywordElectrical impedance tomography, back-projection, algebraic reconstruction technique, DART
AbstractThis work presents the image reconstruction algorithm for EIT that can enhance the speed of image reconstruction and the quality of reconstructed image. The main idea of the proposed algorithm is weighting matrices, which are obtained by the interpolation of the stream lines. Numerical experiments demonstrate that proposed algorithm provides improved reconstruction performance in terms of computational time and image quality.