| Title | A Note on Three-Dimensional Firing Squad Synchronization Algorithm |
| Author | *Takuya Yamawaki, Takashi Amesara, Hiroshi Umeo (Osaka Electro-Communication University, Japan) |
| Page | pp. 773 - 776 |
| Keyword | Cellular automaton, Syncronization algorithm, Three-dimensional cellular automaton, Firing squad synchronization problem |
| Abstract | The firing squad synchronization problem on cellular
automata has been studied extensively for more than forty
years, and a rich variety of synchronization algorithms have been
proposed [1-10]. In the present paper, we propose an optimumtime
firing squad synchronization algorithm for three-dimensional
cellular automata. The algorithm can synchronize any threedimensional
array of size m × n × l with a general at an arbitrary
corner cell at exactly m+ n + l + max(m, n, l) - 4steps. A lower
bound in time complexity is also given. |
| Title | Implementation of a DMAC using SystemC |
| Author | Young-Jin Oh, *Byeong-Deok Kim, Myoung-Keun You, Gi-Yong Song (Chungbuk National University, Republic of Korea) |
| Page | pp. 777 - 780 |
| Keyword | System-Level Design, SystemC, Channel, DMAC |
| Abstract | Recently, SystemC has been stressed in system-level design methodology because of the capability of system architectural model description and co-design hardware and software design. Also SystemC has many features on modeling as well as verification. DMA is an essential feature of modern systems. It improves performance of system and decreases CPU overhead. This paper describes an implementation of a DMAC using SystemC and compares performance in each channel and each system-level. By comparison of performances, we found out a proper abstraction level model for system-level design. |
| Title | Implementation of a Functional Verification System using SystemC |
| Author | Myoung-Keun You, *Young-Jin Oh, Gi-Yong Song (Chungbuk National University, Republic of Korea) |
| Page | pp. 781 - 784 |
| Keyword | Functional Verification, SystemC, High-Level Abstraction, VPI |
| Abstract | The implementation of a functional verification system using SystemC, system-level design language, is presented in this paper. SystemC is used in system-level design methodology because of the capability of system architectural model description and hardware/software design. The implemented verification system, which consists of various SystemC modules, in this paper can explore design space using SystemC and verify functional correction of progressive refined module in RTL HDL. The functional verification is performed on a simple device-under-test, the transposed FIR filter. Connections between SystemC simulation kernel and HDL simulator are achieved through user-defined system function of HDL simulator and communication channel. |
| Title | Implementation of a High-Level Hardware Verification System using Truss |
| Author | *Myoung-Keun You, Joo-Hong Kim, Gi-Yong Song (Chungbuk National University, Republic of Korea) |
| Page | pp. 785 - 788 |
| Keyword | Functional Verification of Hardware, Teal & Truss, OOP, VPI |
| Abstract | The implementation of a high-level hardware verification system using Truss is presented in this paper. Teal is a C++ class library for functional verification and enables functional verification by providing connections to HDL signals and allowing actions based on changes in the HDL simulation. Truss is an implementation of an open-source verification infrastructure based on layer approach through object-oriented programming techniques. The functional verification is performed on a simple device-under-test, the transposed FIR filter. The FIR filter which processes convolution sum is a typical operation being involved in various applications regarding DSP. |