ITC-CSCC2008 Technical Program

The 23rd International Technical Conference on Circuits/Systems, Computers and Communications

Session C4 Linear/ Nonlinear Systems 1
Time: 9:00 - 10:30 Tuesday, July 8, 2008
Location: 9F 901 Room
Chairs: Jongkun Lee (Changwon University, Republic of Korea), Kyou Takahashi (Iwate Industrial Reseach Institute, Japan)

C4-1 (Time: 9:00 - 9:18)

Title	A New CMOS Squaring Circuit Using Voltage/Current Input
Author	*Chaiwat Sakul (Rajamangala University of Technology Srivijaya, Thailand)
Page	pp. 525 - 528
Keyword	Squaring Circuit, Analog circuit
Abstract	This paper proposes a new CMOS squaring circuit using voltage/current input. It consists of a mixed signal circuit and a basic squarer. Its major advantages over the other square are: this design can take two inputs (voltage input, current input), its output can be the square of a voltage signal or the square of a current signal. Simulation results are carried by PSpice program. They find that the circuit can operate at +-2_V power supplies, the voltage input range is +-0.6_V , the current input range is +-0.6 µA, the current output range is 0.55 µA and the -3 dB bandwidth is 31 MHz.

C4-2 (Time: 9:18 - 9:36)

Title	An Improved Bipolar Multiplier using a High Linear Transconductors with Wideband Input
Author	*Sung-Ho Yun, Yun-Mi Na, Hyeong-Woo Cha (School of Electronic Communication Eng., Cheongju University, Republic of Korea)
Page	pp. 529 - 532
Keyword	multiplier, transconductor, wideband, high linearity
Abstract	A improved bipolar multiplier using a high linear transconductors with wide dynamic range for accuracy instrumentation system was designed. The multiplier consists of two high linear transconductors, a multiplier core, and a differential to single-ended converter. The transconductor has high linear and wide dynamic input range because of adaptive bias circuits. For the verification of the performance for the proposed multiplier, we simulated with the circuit of the commercial device of the AD534. The simulation result shows that the AD534 has dynamic range of ±10V and the proposed multiplier has ±13V at supply voltage ±15V, respectively. The linearity error of the proposed multiplier was five times smaller than that of the AD534. The power dissipation of the multipliers were the same.

C4-3 (Time: 9:36 - 9:54)

Title	A Method to Improve Linearity of a Variable Operating Range Transconductor
Author	*Toshio Miyazawa, Fujihiko Matsumoto, Kazufumi Kanegae, Yasuaki Noguchi (National Defense Academy, Japan)
Page	pp. 533 - 536
Keyword	Integrated circuits, Analog circuits, CMOS, Transconductor, Linear circuits
Abstract	A transconductor using bias offset technique is known as a linear MOS transconductor. The linearity is deteriorated by nonideal factors. Major deterioration is caused by mobility degradation from an effect of vertical field. This paper proposes a linearization technique of the MOS transconductor following change of operating range. This technique improves the linearity of transconductance characteristic by adding two MOSFETs operating as resistors and a source follower to the conventional circuit.

C4-4 (Time: 9:54 - 10:12)

Title	A CMOS Square-Rooting Circuits
Author	*Chaiwat Sakul (Rajamangala University of Technology Srivijaya, Thailand)
Page	pp. 537 - 540
Keyword	Square-rooting circuit, CMOS, Current-mirror
Abstract	The article proposes the square-rooting circuit. It bases the square-law characteristics of CMOS operating in saturation region for generating square-root function. The principle of the research is attained by the current-mirror circuit, which controls the voltages. The designed circuit dominates current as input and voltage as output. The structure of the circuit is simplified by only seven CMOS. Simulation results are demonstrated by PSpice program. They find that an input range is about 3µA. whereas ±1.5_V supply voltage.

C4-5 (Time: 10:12 - 10:30)

Title	Spreading Sequences with Negative Auto-correlations Generated by LFSRs Based on Chaos Theory of Modulo-2 Added Sequences
Author	*Yasunori Miyazaki, Akio Tsuneda, Takahiro Inoue (Kumamoto University, Japan)
Page	pp. 541 - 544
Keyword	linear feedback shift register, M-sequence, negative auto-correlation, CDMA
Abstract	Spreading sequences with exponentially vanishing negative auto-correlations can reduce bit error rate in asynchronous DS/CDMA systems compared with the conventional M-sequences and Gold Sequences generated by linear feedback shift registers (LFSRs). In this paper, we design spreading sequences with negative (but not exponentially vanishing) auto-correlations to be generated by LFSRs, which is based on the chaos theory for the Bernoulli chaotic map and modulo-2 added binary sequences. By numerical experiments, we investigate statistical properties (auto-/cross-correlations) of the proposed sequences.