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| Monday, March 11, 2024 |
| Title | (Keynote Speech) My Last Dance -- Development and Applications of a Memory-Traffic-Efficient Convolutional Neural Network |
| Author | *Youn-Long Lin (National Tsing Hua Univ., Taiwan) |
| Page | p. 1 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Novel Task Deployment Framework for Heterogeneous Multicore Systems Considering Circuit Aging |
| Author | Yu-Guang Chen (National Central Univ., Taiwan), Ing-Chao Lin, Yu-Lin Chen, *Yi-Ping Chen (National Cheng Kung Univ., Taiwan) |
| Page | pp. 2 - 7 |
| Detailed information (abstract, keywords, etc) | |
| Title | FPGA Implementation of a DPU-Based Facial Expression Recognition System |
| Author | *Takuto Ando, Yusuke Inoue (National Inst. of Tech., Oita College, Japan) |
| Page | pp. 8 - 13 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Optoelectronic Pipelined Convolutional-RNN Architecture for Energy-Efficient AI Accelerator |
| Author | *Chunlu Wang, Yutaka Masuda, Tohru Ishihara (Nagoya Univ., Japan) |
| Page | pp. 14 - 19 |
| Detailed information (abstract, keywords, etc) | |
| Title | Double Moduler Redundancy Design of LSI Controller for Soft Error Tolerance |
| Author | *Katsutoshi Otsuka, Kazuhito Ito (Saitama Univ., Japan) |
| Page | pp. 20 - 25 |
| Detailed information (abstract, keywords, etc) | |
| Title | Architecture and Implementation of Micro-ROS with OpenAMP on an Heterogeneous Multi-core Processor |
| Author | *Vincent Conus, Shinya Honda, Shinkichi Inagaki (Nanzan Univ., Japan) |
| Page | pp. 26 - 31 |
| Detailed information (abstract, keywords, etc) | |
| Title | Efficient FPGA Implementation of Binarized Neural Networks Based on Generalized Parallel Counter Tree |
| Author | Takahiro Tanigawa, *Mugi Noda, Nagisa Ishiura (Kwansei Gakuin Univ., Japan) |
| Page | pp. 32 - 37 |
| Detailed information (abstract, keywords, etc) | |
| Title | Circuit Division for Gaussian Elimination-based NNA-Compliant Circuit Synthesis Utilizing Reinforcement Learning |
| Author | *Huan Yu (Ritsumeikan Univ., Japan), Atsushi Matsuo (IBM Research - Tokyo, Japan), Shigeru Yamashita (Ritsumeikan Univ., Japan) |
| Page | pp. 38 - 43 |
| Detailed information (abstract, keywords, etc) | |
| Title | Automated FPGA Implementation of Convolutional Neural Networks with Pipelining and Layer Partitioning |
| Author | Eito Yamada, *Kazuyoshi Takagi (Mie Univ., Japan) |
| Page | pp. 44 - 45 |
| Detailed information (abstract, keywords, etc) | |
| Title | Masking Regularity of Noise for Tamper-resistant Design on FPGAs |
| Author | *Yui Koyanagi, Tomoaki Ukezono (Fukuoka Univ., Japan) |
| Page | pp. 46 - 49 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Fast Three-layer Bottleneck Channel Track Assignment with Layout Constraints using ILP |
| Author | *Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi (Tokyo Inst. of Tech., Japan), Mathieu Molongo, Makoto Minami, Katsuya Nishioka (Jedat, Japan) |
| Page | pp. 50 - 55 |
| Detailed information (abstract, keywords, etc) | |
| Title | Fast Integer Linear Programming for Set-Pair Routing Problem |
| Author | *Yasuhiro Takashima (Univ. of Kitakyushu, Japan) |
| Page | pp. 56 - 61 |
| Detailed information (abstract, keywords, etc) | |
| Title | Multi-pin Net Substrate Routing Framework for Fine Pitch Ball Grid Array |
| Author | Ming-Yen Chuang, *Yi-Yu Liu (National Taiwan Univ. of Science and Tech., Taiwan) |
| Page | pp. 62 - 67 |
| Detailed information (abstract, keywords, etc) | |
| Title | Transmitting Coil for Uniform Magnetic Flux Density |
| Author | *Tatsumu Mitsuhashi, Toshiki Kanamoto (Hirosaki Univ., Japan), Koutaro Hachiya (Teikyo Heisei Univ., Japan), Atsushi Kurokawa (Hirosaki Univ., Japan) |
| Page | pp. 68 - 73 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Comparator with Controllable Offset Voltage Variation for Stochastic Flash ADC |
| Author | *Taira Sakaguchi, Satoshi Komatsu (Tokyo Denki Univ., Japan) |
| Page | pp. 74 - 77 |
| Detailed information (abstract, keywords, etc) | |
| Title | Development of a Remote Monitoring System for Lithium-ion Batteries by Using IoT and Real-time Processing |
| Author | *Kosuke Shibuya, Masahiro Fukui (Ritsumeikan Univ., Japan) |
| Page | pp. 78 - 83 |
| Detailed information (abstract, keywords, etc) | |
| Title | Development of Snowfall Prediction System using X-band Weather Radar and Artificial Intelligence |
| Author | *Atsushi Onodera, Masashi Imai (Hirosaki Univ., Japan) |
| Page | pp. 84 - 85 |
| Detailed information (abstract, keywords, etc) | |
| Title | (Invited Talk) Technology Challenges of Verification and Post-Silicon Validation for Supercomputer Fugaku |
| Author | Takahide Yoshikawa (Fujitsu, Japan) |
| Page | p. 86 |
| Detailed information (abstract, keywords, etc) | |
| Title | Enhancing visual similarities in DNA-based similar image retrieval |
| Author | *Takefumi Koike, Takashi Sato (Kyoto Univ., Japan) |
| Page | pp. 87 - 92 |
| Detailed information (abstract, keywords, etc) | |
| Title | An IoT platform "My-IoT" and its enhancement |
| Author | *Hidetomo Shibamura (Kyushu Univ., Japan), Yoshimitsu Okayama (Univ. of Electro-Communications, Japan), Koji Inoue (Kyushu Univ., Japan) |
| Page | pp. 93 - 94 |
| Detailed information (abstract, keywords, etc) | |
| Title | A CNN Network Suitable for FPGA Implementation in Surveillance Camera Systems |
| Author | *Shota Ishikawa, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan) |
| Page | pp. 95 - 100 |
| Detailed information (abstract, keywords, etc) | |
| Title | Multiple regression analysis considering multicollinearity for estimating CPU cycles using performance counters |
| Author | *Ryota Hattori, Yoshinori Takeuchi (Kindai Univ., Japan) |
| Page | pp. 101 - 106 |
| Detailed information (abstract, keywords, etc) | |
| Title | On Construction of Trajectory of Boxer's Punch using a single IMU |
| Author | Yu-Cheng Lee, *Kai-Po Hsu, Yun-Ju Lee, Yi-Ting Li (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan), Wen-Hsin Chiu, Chun-Yao Wang (National Tsing Hua Univ., Taiwan) |
| Page | pp. 107 - 112 |
| Detailed information (abstract, keywords, etc) | |
| Title | Iterative Linear Transformation to Reduce Compound Variables |
| Author | *Tsutomu Sasao (Meiji Univ., Japan) |
| Page | pp. 113 - 118 |
| Detailed information (abstract, keywords, etc) | |
| Title | Optimizing Gaussian Elimination-based NNA-compliant Circuit Synthesis by Simulated Annealing-based CNOT Gates Insertion |
| Author | *Zanhe Qi (Ritsumeikan Univ., Japan), Atsushi Matsuo (IBM Research - Tokyo, Japan), Shigeru Yamashita (Ritsumeikan Univ., Japan) |
| Page | pp. 119 - 124 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Error Diagnosis Technique Based on Location Variable Simulation Employing Dedicated Multiplicity-Limiter Function and Ordering for Input Patterns |
| Author | *Hiroki Tsuyama, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan) |
| Page | pp. 125 - 130 |
| Detailed information (abstract, keywords, etc) | |
| Title | Accurate Performance Estimation with BBFDA: Beyond Granularity Constraints |
| Author | Hsuan-Yi Lin, *Ren-Song Tsay (National Tsing Hua Univ., Taiwan) |
| Page | pp. 131 - 133 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Machine Learning-Based Approach to Cell Layout Optimization Considering LDEs |
| Author | Ya-Rou Hsu, *Yen-Ju Su, Chia-Wei Liang, Han-Ya Tsai, Hung-Pin Wen (National Yang Ming Chiao Tung Univ., Taiwan), Hsuan-Ming Huang (MediaTek, Taiwan) |
| Page | pp. 134 - 137 |
| Detailed information (abstract, keywords, etc) | |
| Title | Active Learning-based Practical Power Estimation Considering Multi-Cycle Paths |
| Author | Shao-Min Liu, *Shao-Yun Fang (National Taiwan Univ. of Science and Tech., Taiwan), Hsiang-Wen Chang, Ming-Chao Lee, Peter Wei (Synopsys, Taiwan) |
| Page | pp. 138 - 143 |
| Detailed information (abstract, keywords, etc) | |
| Title | RESURF Structure Optimization of SiC Trench MOSFET using Machine Learning |
| Author | *Tomoya Akasaka (Hirosaki Univ., Japan), Ichirota Takazawa (JEDAT, Japan), Seria Kasai, Atsushi Kurokawa, Toshiki Kanamoto (Hirosaki Univ., Japan) |
| Page | pp. 144 - 149 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Search Algorithm for Optimal Resistance Measurement Points in Testing Power TSV with Manufacturing Variation Cancellation |
| Author | *Yudai Kawakami, Koutaro Hachiya (Teikyo Heisei Univ., Japan) |
| Page | pp. 150 - 154 |
| Detailed information (abstract, keywords, etc) | |
| Title | Optimal Inner Diameter of Single-Layer Planar Spiral Coils |
| Author | *Kotaro Terada (Hirosaki Univ., Japan), Koutaro Hachiya (Teikyo Heisei Univ., Japan), Toshiki Kanamoto, Atsushi Kurokawa (Hirosaki Univ., Japan) |
| Page | pp. 155 - 159 |
| Detailed information (abstract, keywords, etc) | |
| Title | FPGA-Based Deep-Pipelined Architecture for Vision Transformer's Multi-Head Attention |
| Author | *Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ., Japan), Daisuke Tanaka (Niihama College, Japan) |
| Page | pp. 160 - 163 |
| Detailed information (abstract, keywords, etc) | |
| Title | RLGC-Model-Based Film-Type Electromagnetic-Wave Absorber Design |
| Author | *Sangyeop Lee (Tokyo Inst. of Tech., Japan) |
| Page | pp. 164 - 167 |
| Detailed information (abstract, keywords, etc) | |
| Title | (Panel Discussion) Counting the Blessings of Long Lasting SASIMI: Retrospectives of Senior SASIMIers |
| Author | Moderator: Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan), Panelists: Nagisa Ishiura (Kwansei Gakuin Univ., Japan), Shin-ichi Minato (Kyoto Univ., Japan), Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan), Yu-Guang Chen (National Central Univ., Taiwan), Organizer: Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan) |
| Page | p. 168 |
| Detailed information (abstract, keywords, etc) | |
| Tuesday, March 12, 2024 |
| Title | (Keynote Speech) Big AI for Small Devices |
| Author | Yiran Chen (Duke Univ., USA) |
| Page | p. 169 |
| Detailed information (abstract, keywords, etc) | |
| Title | Optimization of Pipeline Schedule for Hardware Efficient Two-Level Adiabatic Logic Circuits |
| Author | *Yuya Ushioda, Mineo Kaneko (JAIST, Japan) |
| Page | pp. 170 - 175 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Integer-Linear-Programming-Based Logic Locking Approach for Threshold Logic Gates |
| Author | Yueh Cho, Ting-Yu Yeh, *Yu-Shan Lin, Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan) |
| Page | pp. 176 - 180 |
| Detailed information (abstract, keywords, etc) | |
| Title | Native Code Level Test of Optimizing Performance of Android Compilers |
| Author | Naoki Yoshida, *Toya Hamada, Nagisa Ishiura (Kwansei Gakuin Univ., Japan) |
| Page | pp. 181 - 186 |
| Detailed information (abstract, keywords, etc) | |
| Title | Lightweight Monocular Depth Estimation Network Using Separable Convolution |
| Author | *Kazuki Numata, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan) |
| Page | pp. 187 - 192 |
| Detailed information (abstract, keywords, etc) | |
| Title | Assessing the Impact of Signal Strength Variability on AI-based Heart Sound Analysis |
| Author | *Kyoichi Oyama, Chao Geng, Shigetoshi Nakatake (Univ. of Kitakyushu, Japan) |
| Page | pp. 193 - 194 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Efficient Approach to Iterative Network Pruning |
| Author | Chuan-Shun Huang, Wuqian Tang (National Tsing Hua Univ., Taiwan), *Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan), Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang (National Tsing Hua Univ., Taiwan) |
| Page | pp. 195 - 200 |
| Detailed information (abstract, keywords, etc) | |
| Title | Squaremax: A Hardware-Friendly Replacement for Softmax and Its Efficient VLSI Design and Implementation |
| Author | *Meng-Hsun Hsieh, Xuan-Hong Li, Yu-Hsiang Huang, Pei-Hsuan Kuo, Juinn-Dar Huang (National Yang Ming Chiao Tung Univ., Taiwan) |
| Page | pp. 201 - 205 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Approximate Fault-Tolerance Mechanism for SRAM-Based Near-Memory MAC Units |
| Author | Yung-Chieh Lin, *Shih-Hsu Huang (Chung Yuan Christian Univ., Taiwan) |
| Page | pp. 206 - 211 |
| Detailed information (abstract, keywords, etc) | |
| Title | Expanding Tail Layer Training Scope on FPGA with Data Augmentation |
| Author | *Yuki Takashima, Akira Jinguji, Ryota Kayanoma (Tokyo Inst. of Tech., Japan), Hiroki Nakahara (Tohoku Univ., Japan) |
| Page | pp. 212 - 217 |
| Detailed information (abstract, keywords, etc) | |
| Title | Broadband 5G Millimeter-Wave Low Noise Amplifier (LNA) Design in 22 nm FD-SOI CMOS and 40 nm GaN HEMT |
| Author | *Clint Sweeney, Liang-Wei Ouyang, Yu-Chun Donald Lie (Texas Tech Univ., USA) |
| Page | pp. 218 - 220 |
| Detailed information (abstract, keywords, etc) | |
| Title | Experimental Study of Pass/Fail Threshold Determination Based on Gaussian Process Regression |
| Author | *Daisuke Goeda (Kyoto Inst. of Tech., Japan), Tomoki Nakamura, Masuo Kajiyama, Makoto Eiki (Sony Semiconductor Manufacturing, Japan), Takashi Sato (Kyoto Univ., Japan), Michihiro Shintani (Kyoto Inst. of Tech., Japan) |
| Page | pp. 221 - 226 |
| Detailed information (abstract, keywords, etc) | |
| Title | Energy Reduction of Health Monitoring Processor by Optimizing Supply and Back-Gate Voltages with Simulated Annealing |
| Author | *Seria Kasai, Yamato Ishida, Fumiya Sano, Tomoya Akasaka (Hirosaki Univ., Japan), Masami Fukushima, Koichi Kitagishi, Seijin Nakayama (UNO Laboratories, Japan), Hideki Ishihara (AQUAXIS TECHNOLOGY, Japan), Masashi Imai, Atsushi Kurokawa, Toshiki Kanamoto (Hirosaki Univ., Japan) |
| Page | pp. 227 - 232 |
| Detailed information (abstract, keywords, etc) | |
| Title | CMOS Bandgap Voltage Reference with Calibration Circuit for Process Variation |
| Author | *Ryuji Hayashi, Masayoshi Tachibana (Kochi Univ. of Tech., Japan) |
| Page | pp. 233 - 237 |
| Detailed information (abstract, keywords, etc) | |
| Title | IR drop Prediction Based on Machine Learning and Pattern Reduction |
| Author | Yong-Fong Chang (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (Natinoal Taiwan Univ. of Science and Tech., Taiwan), *Yu-Chen Cheng (National Tsing Hua Univ., Taiwan), Shu-Hong Lin, Che-Hsu Lin (Natinoal Taiwan Univ. of Science and Tech., Taiwan), Chun-Yuan Chen, Yu-Hsuan Chen, Yu-Che Lee (National Tsing Hua Univ., Taiwan), Jia-Wei Lin, Hsun-Wei Pao (MediaTek, Taiwan), Shih-Chieh Chang, Yi-Ting Li, Chun-Yao Wang (National Tsing Hua Univ., Taiwan) |
| Page | pp. 238 - 243 |
| Detailed information (abstract, keywords, etc) | |
| Title | Evaluation of FPGA Performance in a Cryogenic Environment |
| Author | *Akimasa Saito, Masashi Imai (Hirosaki Univ., Japan) |
| Page | pp. 244 - 249 |
| Detailed information (abstract, keywords, etc) | |
| Title | Rad-Hard Flip-Flop Design for Automotive Electronics with Temperature-Tolerance |
| Author | Ralf E.-H. Yee, *Lowry P.-T. Wang, Yen-Ju Su, Charles H.-P. Wen, Herming Chiueh (National Yang Ming Chiao Tung Univ., Taiwan) |
| Page | pp. 250 - 253 |
| Detailed information (abstract, keywords, etc) | |
| Title | Development of Tsugaru Dialect Dictionary Management System |
| Author | *Ryota Sato, Masashi Imai (Hirosaki Univ., Japan) |
| Page | pp. 254 - 259 |
| Detailed information (abstract, keywords, etc) | |
| Title | (Invited Talk) Design Automation for Quantum Computing: How to (Not) Re-invent the Wheel for an Emerging Technology |
| Author | Robert Wille (Tech. Univ. of Munich, Germany) |
| Page | p. 260 |
| Detailed information (abstract, keywords, etc) | |
| Title | Voltage Dependence Model of Electromagnetic Side-Channel Attacks on Cryptographic Circuits |
| Author | *Kazuki Minamiguchi, Yoshihiro Midoh, Noriyuki Miura, Jun Shiomi (Osaka Univ., Japan) |
| Page | pp. 261 - 266 |
| Detailed information (abstract, keywords, etc) | |
| Title | Efficient Yield Analysis for SRAM-Based System with PDF Consolidation Methodology |
| Author | *Shih-Han Chang, Ling-Yen Song, Yen-Chen Chun, Yu-Cheng Tsai, Chien-Nan Liu (National Yang Ming Chiao Tung Univ., Taiwan) |
| Page | pp. 267 - 270 |
| Detailed information (abstract, keywords, etc) | |
| Title | Ramanujan Edge-Popup: Finding Strong Lottery Tickets with Ramanujan Graph Properties for Efficient DNN Inference Execution |
| Author | *Hikari Otsuka, Yasuyuki Okoshi, Ángel López García-Arias, Kazushi Kawamura, Thiem Van Chu, Masato Motomura (Tokyo Inst. of Tech., Japan) |
| Page | pp. 271 - 274 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Design Strategy for Processing-in-Memory Accelerators Using Cell-based DRAM |
| Author | *Tai-Feng Chen, Yutaka Masuda, Tohru Ishihara (Nagoya Univ., Japan) |
| Page | pp. 275 - 280 |
| Detailed information (abstract, keywords, etc) | |
| Title | Model Reduction Using a Hybrid Approach of Genetic Algorithm and Rule-based Method |
| Author | Wuqian Tang, Chuan-Shun Huang (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan), *Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang (National Tsing Hua Univ., Taiwan) |
| Page | pp. 281 - 286 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Efficient Routing Method for Micro-Electrode-Dot-Array Digital Microfluidic Biochips Considering Droplet Division and Velocity |
| Author | *Chuan Lin, Debraj Kundu, Shigeru Yamashita, Hiroyuki Tomiyama (Ritsumeikan Univ., Japan) |
| Page | pp. 287 - 292 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Study on an Interface Circuit for Burst Transfers from Synchronous to Asynchronous Circuits Considering Cycle Times |
| Author | *Shogo Semba, Hiroshi Saito (Univ. of Aizu, Japan) |
| Page | pp. 293 - 298 |
| Detailed information (abstract, keywords, etc) | |
| Title | Reduction of Static Power Consumption of LSI by Decreasing Leakage Current Paths with Equivalent Logic Expression Conversion |
| Author | *Kazuma Dobata, Kazuhito Ito (Saitama Univ., Japan) |
| Page | pp. 299 - 304 |
| Detailed information (abstract, keywords, etc) | |
| Title | Template Design and Layout Decomposition for Lamellar DSA with Donut-Shaped Templates |
| Author | *Yun-Na Tsai, Shao-Yun Fang (National Taiwan Univ. of Science and Tech., Taiwan) |
| Page | pp. 305 - 310 |
| Detailed information (abstract, keywords, etc) | |
| Title | On Effective Usage of APR Tools for Display Driver IC Layout Generation |
| Author | Kai-Liang Liang, Li-Yu Lin, *Hung-Ming Chen (NYCU, Taiwan) |
| Page | pp. 311 - 316 |
| Detailed information (abstract, keywords, etc) | |
| Title | Polygon Fracturing Method Considering Maximum Size Limit |
| Author | *Taiki Matsuzaki, Kunihiro Fujiyoshi, Tomohiko Hotta (Tokyo Univ. of Agri. and Tech., Japan) |
| Page | pp. 317 - 322 |
| Detailed information (abstract, keywords, etc) | |
| Title | Pin Access-Aware Power Distribution Network Optimization in 7nm Technology |
| Author | Wei-Shou Wu, *Rung-Bin Lin (Yuan Ze Univ., Taiwan) |
| Page | pp. 323 - 327 |
| Detailed information (abstract, keywords, etc) | |
| Title | Anomaly Classification with Anomaly-Focused Patch Selection by Gaussian Distribution |
| Author | *Yuga Ono, Lin Meng (Ritsumeikan Univ., Japan) |
| Page | pp. 328 - 332 |
| Detailed information (abstract, keywords, etc) | |
| Title | Architecture of an FPGA-Based Brain Neural Network Simulator Using Direct Mapping |
| Author | Hasitha Muthumala Waidyasooriya, *Mizuki Harasawa, Masanori Hariyama (Tohoku Univ., Japan) |
| Page | pp. 333 - 334 |
| Detailed information (abstract, keywords, etc) | |
| Title | CODEC system using EG2C chips and power control with a sleep mode for a visual prosthesis |
| Author | *Naoya Tanaka, Shogo Hirayama, Yoshinori Takeuchi (Kindai Univ., Japan) |
| Page | pp. 335 - 340 |
| Detailed information (abstract, keywords, etc) | |
| Title | Hybrid Refinement Strategy for Package Substrate Routing |
| Author | Tsubasa Koyama, *Ding-Hsun Lin, Yu-Jen Chen (National Tsing Hua Univ., Taiwan), Keng-Tuan Chang, Chih-Yi Huang, Chen-Chao Wang (Advanced Semiconductor Engineering (ASE), Taiwan), Tsung-Yi Ho (National Tsing Hua Univ./Chinese Univ. of Hong Kong, Taiwan) |
| Page | pp. 341 - 346 |
| Detailed information (abstract, keywords, etc) | |