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SASIMI 2024
The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies
Technical Program

Remark: The presenter of each paper is marked with "*".
Technical Program:   SIMPLE version   DETAILED version with abstract
Author Index:   HERE

Session Schedule

Monday, March 11, 2024

Registration
8:30 -
Opening
9:00 - 9:20
K1  Keynote Speech I
9:20 - 10:30
R1  Regular Poster Session I
10:30 - 12:00
Lunch Break
12:00 - 13:30
I1  Invited Talk I
13:30 - 14:30
R2  Regular Poster Session II
14:30 - 16:00
D  Panel Discussion
16:00 - 17:30
Banquet
18:00 - 20:00
Tuesday, March 12, 2024

K2  Keynote Speech II
9:20 - 10:30
R3  Regular Poster Session III
10:30 - 12:00
Lunch Break
12:00 - 13:30
I2  Invited Talk II
13:30 - 14:30
R4  Regular Poster Session IV
14:30 - 16:00
Closing
16:00 -


List of papers

Remark: The presenter of each paper is marked with "*".

Monday, March 11, 2024

[To Session Table]

Keynote Speech I
Time: 9:20 - 10:30, Monday, March 11, 2024
Chair: Hung-Ming Chen (National Yang Ming Chiao Tung Univ., Taiwan)

K1-1 (Time: 9:20 - 10:30)
Title(Keynote Speech) My Last Dance -- Development and Applications of a Memory-Traffic-Efficient Convolutional Neural Network
Author*Youn-Long Lin (National Tsing Hua Univ., Taiwan)
Detailed information (abstract, keywords, etc)


[To Session Table]

Regular Poster Session I
Time: 10:30 - 12:00, Monday, March 11, 2024
Chairs: Hasitha Muthumala Waidyasooriya (Tohoku Univ., Japan), Michihiro Shintani (Kyoto Inst. of Tech., Japan)

R1-1 (Time: 10:30 - 10:32)
TitleA Novel Task Deployment Framework for Heterogeneous Multicore Systems Considering Circuit Aging
AuthorYu-Guang Chen (National Central Univ., Taiwan), Ing-Chao Lin, Yu-Lin Chen, *Yi-Ping Chen (National Cheng Kung Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R1-2 (Time: 10:32 - 10:34)
TitleFPGA Implementation of a DPU-Based Facial Expression Recognition System
Author*Takuto Ando, Yusuke Inoue (National Inst. of Tech., Oita College, Japan)
Detailed information (abstract, keywords, etc)

R1-3 (Time: 10:34 - 10:36)
TitleAn Optoelectronic Pipelined Convolutional-RNN Architecture for Energy-Efficient AI Accelerator
Author*Chunlu Wang, Yutaka Masuda, Tohru Ishihara (Nagoya Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-4 (Time: 10:36 - 10:38)
TitleDouble Moduler Redundancy Design of LSI Controller for Soft Error Tolerance
Author*Katsutoshi Otsuka, Kazuhito Ito (Saitama Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-5 (Time: 10:38 - 10:40)
TitleArchitecture and Implementation of Micro-ROS with OpenAMP on an Heterogeneous Multi-core Processor
Author*Vincent Conus, Shinya Honda, Shinkichi Inagaki (Nanzan Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-6 (Time: 10:40 - 10:42)
TitleEfficient FPGA Implementation of Binarized Neural Networks Based on Generalized Parallel Counter Tree
AuthorTakahiro Tanigawa, *Mugi Noda, Nagisa Ishiura (Kwansei Gakuin Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-7 (Time: 10:42 - 10:44)
TitleCircuit Division for Gaussian Elimination-based NNA-Compliant Circuit Synthesis Utilizing Reinforcement Learning
Author*Huan Yu (Ritsumeikan Univ., Japan), Atsushi Matsuo (IBM Research - Tokyo, Japan), Shigeru Yamashita (Ritsumeikan Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-8 (Time: 10:44 - 10:46)
TitleAutomated FPGA Implementation of Convolutional Neural Networks with Pipelining and Layer Partitioning}
AuthorEito Yamada, *Kazuyoshi Takagi (Mie Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-9 (Time: 10:46 - 10:48)
TitleMasking Regularity of Noise for Tamper-resistant Design on FPGAs
Author*Yui Koyanagi, Tomoaki Ukezono (Fukuoka Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-10 (Time: 10:48 - 10:50)
TitleA Fast Three-layer Bottleneck Channel Track Assignment with Layout Constraints using ILP
Author*Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi (Tokyo Inst. of Tech., Japan), Mathieu Molongo, Makoto Minami, Katsuya Nishioka (Jedat, Japan)
Detailed information (abstract, keywords, etc)

R1-11 (Time: 10:50 - 10:52)
TitleFast Integer Linear Programming for Set-Pair Routing Problem
Author*Yasuhiro Takashima (Univ. of Kitakyushu, Japan)
Detailed information (abstract, keywords, etc)

R1-12 (Time: 10:52 - 10:54)
TitleMulti-pin Net Substrate Routing Framework for Fine Pitch Ball Grid Array
AuthorMing-Yen Chuang, *Yi-Yu Liu (National Taiwan Univ. of Science and Tech., Taiwan)
Detailed information (abstract, keywords, etc)

R1-13 (Time: 10:54 - 10:56)
TitleTransmitting Coil for Uniform Magnetic Flux Density
Author*Tatsumu Mitsuhashi, Toshiki Kanamoto (Hirosaki Univ., Japan), Koutaro Hachiya (Teikyo Heisei Univ., Japan), Atsushi Kurokawa (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-14 (Time: 10:56 - 10:58)
TitleA Comparator with Controllable Offset Voltage Variation for Stochastic Flash ADC
Author*Taira Sakaguchi, Satoshi Komatsu (Tokyo Denki Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-15 (Time: 10:58 - 11:00)
TitleDevelopment of a Remote Monitoring System for Lithium-ion Batteries by Using IoT and Real-time Processing
Author*Kosuke Shibuya, Masahiro Fukui (Ritsumeikan Univ., Japan)
Detailed information (abstract, keywords, etc)

R1-16 (Time: 11:00 - 11:02)
TitleDevelopment of Snowfall Prediction System using X-band Weather Radar and Artificial Intelligence
Author*Atsushi Onodera, Masashi Imai (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)


[To Session Table]

Invited Talk I
Time: 13:30 - 14:30, Monday, March 11, 2024
Chair: Shin-ichi Minato (Kyoto Univ., Japan)

I1-1 (Time: 13:30 - 14:30)
Title(Invited Talk) Technology Challenges of Verification and Post-Silicon Validation for Supercomputer Fugaku
AuthorTakahide Yoshikawa (Fujitsu, Japan)
Detailed information (abstract, keywords, etc)


[To Session Table]

Regular Poster Session II
Time: 14:30 - 16:00, Monday, March 11, 2024
Chairs: Jia-Ching Wang (National Central Univ., Taiwan), Chun-Yi Lee (National Tsing Hua Univ., Taiwan)

R2-1 (Time: 14:30 - 14:32)
TitleEnhancing visual similarities in DNA-based similar image retrieval
Author*Takefumi Koike, Takashi Sato (Kyoto Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-2 (Time: 14:32 - 14:34)
TitleAn IoT platform "My-IoT" and its enhancement
Author*Hidetomo Shibamura (Kyushu Univ., Japan), Yoshimitsu Okayama (Univ. of Electro-Communications, Japan), Koji Inoue (Kyushu Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-3 (Time: 14:34 - 14:36)
TitleA CNN Network Suitable for FPGA Implementation in Surveillance Camera Systems
Author*Shota Ishikawa, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-4 (Time: 14:36 - 14:38)
TitleMultiple regression analysis considering multicollinearity for estimating CPU cycles using performance counters
Author*Ryota Hattori, Yoshinori Takeuchi (Kindai Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-5 (Time: 14:38 - 14:40)
TitleOn Construction of Trajectory of Boxer's Punch using a single IMU
AuthorYu-Cheng Lee, *Kai-Po Hsu, Yun-Ju Lee, Yi-Ting Li (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan), Wen-Hsin Chiu, Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R2-6 (Time: 14:40 - 14:42)
TitleIterative Linear Transformation to Reduce Compound Variables
Author*Tsutomu Sasao (Meiji Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-7 (Time: 14:42 - 14:44)
TitleOptimizing Gaussian Elimination-based NNA-compliant Circuit Synthesis by Simulated Annealing-based CNOT Gates Insertion
Author*Zanhe Qi (Ritsumeikan Univ., Japan), Atsushi Matsuo (IBM Research - Tokyo, Japan), Shigeru Yamashita (Ritsumeikan Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-8 (Time: 14:44 - 14:46)
TitleAn Error Diagnosis Technique Based on Location Variable Simulation Employing Dedicated Multiplicity-Limiter Function and Ordering for Input Patterns
Author*Hiroki Tsuyama, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-9 (Time: 14:46 - 14:48)
TitleAccurate Performance Estimation with BBFDA: Beyond Granularity Constraints
AuthorHsuan-Yi Lin, *Ren-Song Tsay (National Tsing Hua Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R2-10 (Time: 14:48 - 14:50)
TitleA Machine Learning-Based Approach to Cell Layout Optimization Considering LDEs
AuthorYa-Rou Hsu, *Yen-Ju Su, Chia-Wei Liang, Han-Ya Tsai, Hung-Pin Wen (National Yang Ming Chiao Tung Univ., Taiwan), Hsuan-Ming Huang (MediaTek, Taiwan)
Detailed information (abstract, keywords, etc)

R2-11 (Time: 14:50 - 14:52)
TitleActive Learning-based Practical Power Estimation Considering Multi-Cycle Paths
AuthorShao-Min Liu, *Shao-Yun Fang (National Taiwan Univ. of Science and Tech., Taiwan), Hsiang-Wen Chang, Ming-Chao Lee, Peter Wei (Synopsys, Taiwan)
Detailed information (abstract, keywords, etc)

R2-12 (Time: 14:52 - 14:54)
TitleRESURF Structure Optimization of SiC Trench MOSFET using Machine Learning
Author*Tomoya Akasaka (Hirosaki Univ., Japan), Ichirota Takazawa (JEDAT, Japan), Seria Kasai, Atsushi Kurokawa, Toshiki Kanamoto (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-13 (Time: 14:54 - 14:56)
TitleA Search Algorithm for Optimal Resistance Measurement Points in Testing Power TSV with Manufacturing Variation Cancellation
Author*Yudai Kawakami, Koutaro Hachiya (Teikyo Heisei Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-14 (Time: 14:56 - 14:58)
TitleOptimal Inner Diameter of Single-Layer Planar Spiral Coils
Author*Kotaro Terada (Hirosaki Univ., Japan), Koutaro Hachiya (Teikyo Heisei Univ., Japan), Toshiki Kanamoto, Atsushi Kurokawa (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)

R2-15 (Time: 14:58 - 15:00)
TitleFPGA-Based Deep-Pipelined Architecture for Vision Transformer's Multi-Head Attention
Author*Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ., Japan), Daisuke Tanaka (Niihama College, Japan)
Detailed information (abstract, keywords, etc)

R2-16 (Time: 15:00 - 15:02)
TitleRLGC-Model-Based Film-Type Electromagnetic-Wave Absorber Design
Author*Sangyeop Lee (Tokyo Inst. of Tech., Japan)
Detailed information (abstract, keywords, etc)


[To Session Table]

Panel Discussion
Time: 16:00 - 17:30, Monday, March 11, 2024
Moderator: Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan)

D-1 (Time: 16:00 - 17:30)
Title(Panel Discussion) Counting the Blessings of Long Lasting SASIMI: Retrospectives of Senior SASIMIers
AuthorModerator: Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan), Panelists: Nagisa Ishiura (Kwansei Gakuin Univ., Japan), Shin-ichi Minato (Kyoto Univ., Japan), Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan), Yu-Guang Chen (National Central Univ., Taiwan), Organizer: Ing-Jer Huang (National Sun Yat-sen Univ., Taiwan)
Detailed information (abstract, keywords, etc)



Tuesday, March 12, 2024

[To Session Table]

Keynote Speech II
Time: 9:20 - 10:30, Tuesday, March 12, 2024
Chair: Hung-Ming Chen (National Yang Ming Chiao Tung Univ., Taiwan)

K2-1 (Time: 9:20 - 10:30)
Title(Keynote Speech) Big AI for Small Devices
AuthorYiran Chen (Duke Univ., USA)
Detailed information (abstract, keywords, etc)


[To Session Table]

Regular Poster Session III
Time: 10:30 - 12:00, Tuesday, March 12, 2024
Chairs: Koutaro Hachiya (Teikyo Heisei Univ., Japan), Shao-Yun Fang (National Taiwan Univ. of Science and Tech., Taiwan)

R3-1 (Time: 10:30 - 10:32)
TitleOptimization of Pipeline Schedule for Hardware Efficient Two-Level Adiabatic Logic Circuits
Author*Yuya Ushioda, Mineo Kaneko (JAIST, Japan)
Detailed information (abstract, keywords, etc)

R3-2 (Time: 10:32 - 10:34)
TitleAn Integer-Linear-Programming-Based Logic Locking Approach for Threshold Logic Gates
AuthorYueh Cho, Ting-Yu Yeh, *Yu-Shan Lin, Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan)
Detailed information (abstract, keywords, etc)

R3-3 (Time: 10:34 - 10:36)
TitleNative Code Level Test of Optimizing Performance of Android Compilers
AuthorNaoki Yoshida, *Toya Hamada, Nagisa Ishiura (Kwansei Gakuin Univ., Japan)
Detailed information (abstract, keywords, etc)

R3-4 (Time: 10:36 - 10:38)
TitleLightweight Monocular Depth Estimation Network Using Separable Convolution
Author*Kazuki Numata, Nobutaka Kuroki, Masahiro Numa (Kobe Univ., Japan)
Detailed information (abstract, keywords, etc)

R3-5 (Time: 10:38 - 10:40)
TitleAssessing the Impact of Signal Strength Variability on AI-based Heart Sound Analysis
Author*Kyoichi Oyama, Chao Geng, Shigetoshi Nakatake (Univ. of Kitakyushu, Japan)
Detailed information (abstract, keywords, etc)

R3-6 (Time: 10:40 - 10:42)
TitleAn Efficient Approach to Iterative Network Pruning
AuthorChuan-Shun Huang, Wuqian Tang (National Tsing Hua Univ., Taiwan), *Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan), Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R3-7 (Time: 10:42 - 10:44)
TitleSquaremax: A Hardware-Friendly Replacement for Softmax and Its Efficient VLSI Design and Implementation
Author*Meng-Hsun Hsieh, Xuan-Hong Li, Yu-Hsiang Huang, Pei-Hsuan Kuo, Juinn-Dar Huang (National Yang Ming Chiao Tung Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R3-8 (Time: 10:44 - 10:46)
TitleAn Approximate Fault-Tolerance Mechanism for SRAM-Based Near-Memory MAC Units
AuthorYung-Chieh Lin, *Shih-Hsu Huang (Chung Yuan Christian Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R3-9 (Time: 10:46 - 10:48)
TitleExpanding Tail Layer Training Scope on FPGA with Data Augmentation
Author*Yuki Takashima, Akira Jinguji, Ryota Kayanoma (Tokyo Inst. of Tech., Japan), Hiroki Nakahara (Tohoku Univ., Japan)
Detailed information (abstract, keywords, etc)

R3-10 (Time: 10:48 - 10:50)
TitleBroadband 5G Millimeter-Wave Low Noise Amplifier (LNA) Design in 22 nm FD-SOI CMOS and 40 nm GaN HEMT
Author*Clint Sweeney, Liang-Wei Ouyang, Yu-Chun Donald Lie (Texas Tech Univ., USA)
Detailed information (abstract, keywords, etc)

R3-11 (Time: 10:50 - 10:52)
TitleExperimental Study of Pass/Fail Threshold Determination Based on Gaussian Process Regression
Author*Daisuke Goeda (Kyoto Inst. of Tech., Japan), Tomoki Nakamura, Masuo Kajiyama, Makoto Eiki (Sony Semiconductor Manufacturing, Japan), Takashi Sato (Kyoto Univ., Japan), Michihiro Shintani (Kyoto Inst. of Tech., Japan)
Detailed information (abstract, keywords, etc)

R3-12 (Time: 10:52 - 10:54)
TitleEnergy Reduction of Health Monitoring Processor by Optimizing Supply and Back-Gate Voltages with Simulated Annealing
Author*Seria Kasai, Yamato Ishida, Fumiya Sano, Tomoya Akasaka (Hirosaki Univ., Japan), Masami Fukushima, Koichi Kitagishi, Seijin Nakayama (UNO Laboratories, Japan), Hideki Ishihara (AQUAXIS TECHNOLOGY, Japan), Masashi Imai, Atsushi Kurokawa, Toshiki Kanamoto (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)

R3-13 (Time: 10:54 - 10:56)
TitleCMOS Bandgap Voltage Reference with Calibration Circuit for Process Variation
Author*Ryuji Hayashi, Masayoshi Tachibana (Kochi Univ. of Tech., Japan)
Detailed information (abstract, keywords, etc)

R3-14 (Time: 10:56 - 10:58)
TitleIR drop Prediction Based on Machine Learning and Pattern Reduction
AuthorYong-Fong Chang (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (Natinoal Taiwan Univ. of Science and Tech., Taiwan), *Yu-Chen Cheng (National Tsing Hua Univ., Taiwan), Shu-Hong Lin, Che-Hsu Lin (Natinoal Taiwan Univ. of Science and Tech., Taiwan), Chun-Yuan Chen, Yu-Hsuan Chen, Yu-Che Lee (National Tsing Hua Univ., Taiwan), Jia-Wei Lin, Hsun-Wei Pao (MediaTek, Taiwan), Shih-Chieh Chang, Yi-Ting Li, Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R3-15 (Time: 10:58 - 11:00)
TitleEvaluation of FPGA Performance in a Cryogenic Environment
Author*Akimasa Saito, Masashi Imai (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)

R3-16 (Time: 11:00 - 11:02)
TitleRad-Hard Flip-Flop Design for Automotive Electronics with Temperature-Tolerance
AuthorRalf E.-H. Yee, *Lowry P.-T. Wang, Yen-Ju Su, Charles H.-P. Wen, Herming Chiueh (National Yang Ming Chiao Tung Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R3-17 (Time: 11:02 - 11:04)
TitleDevelopment of Tsugaru Dialect Dictionary Management System
Author*Ryota Sato, Masashi Imai (Hirosaki Univ., Japan)
Detailed information (abstract, keywords, etc)


[To Session Table]

Invited Talk II
Time: 13:30 - 14:30, Tuesday, March 12, 2024
Chair: Chun-Yao Wang (National Tsing Hua Univ., Taiwan)

I2-1 (Time: 13:30 - 14:30)
Title(Invited Talk) Design Automation for Quantum Computing: How to (Not) Re-invent the Wheel for an Emerging Technology
AuthorRobert Wille (Tech. Univ. of Munich, Germany)
Detailed information (abstract, keywords, etc)


[To Session Table]

Regular Poster Session IV
Time: 14:30 - 16:00, Tuesday, March 12, 2024
Chairs: Masashi Imai (Hirosaki Univ., Japan), Satoshi Komatsu (Tokyo Denki Univ., Japan)

R4-1 (Time: 14:30 - 14:32)
TitleVoltage Dependence Model of Electromagnetic Side-Channel Attacks on Cryptographic Circuits
Author*Kazuki Minamiguchi, Yoshihiro Midoh, Noriyuki Miura, Jun Shiomi (Osaka Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-2 (Time: 14:32 - 14:34)
TitleEfficient Yield Analysis for SRAM-Based System with PDF Consolidation Methodology
Author*Shih-Han Chang, Ling-Yen Song, Yen-Chen Chun, Yu-Cheng Tsai, Chien-Nan Liu (National Yang Ming Chiao Tung Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R4-3 (Time: 14:34 - 14:36)
TitleRamanujan Edge-Popup: Finding Strong Lottery Tickets with Ramanujan Graph Properties for Efficient DNN Inference Execution
Author*Hikari Otsuka, Yasuyuki Okoshi, Ángel López García-Arias, Kazushi Kawamura, Thiem Van Chu, Masato Motomura (Tokyo Inst. of Tech., Japan)
Detailed information (abstract, keywords, etc)

R4-4 (Time: 14:36 - 14:38)
TitleA Design Strategy for Processing-in-Memory Accelerators Using Cell-based DRAM
Author*Tai-Feng Chen, Yutaka Masuda, Tohru Ishihara (Nagoya Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-5 (Time: 14:38 - 14:40)
TitleModel Reduction Using a Hybrid Approach of Genetic Algorithm and Rule-based Method
AuthorWuqian Tang, Chuan-Shun Huang (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (National Taiwan Univ. of Science and Tech., Taiwan), *Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R4-6 (Time: 14:40 - 14:42)
TitleAn Efficient Routing Method for Micro-Electrode-Dot-Array Digital Microfluidic Biochips Considering Droplet Division and Velocity
Author*Chuan Lin, Debraj Kundu, Shigeru Yamashita, Hiroyuki Tomiyama (Ritsumeikan Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-7 (Time: 14:42 - 14:44)
TitleA Study on an Interface Circuit for Burst Transfers from Synchronous to Asynchronous Circuits Considering Cycle Times
Author*Shogo Semba, Hiroshi Saito (Univ. of Aizu, Japan)
Detailed information (abstract, keywords, etc)

R4-8 (Time: 14:44 - 14:46)
TitleReduction of Static Power Consumption of LSI by Decreasing Leakage Current Paths with Equivalent Logic Expression Conversion
Author*Kazuma Dobata, Kazuhito Ito (Saitama Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-9 (Time: 14:46 - 14:48)
TitleTemplate Design and Layout Decomposition for Lamellar DSA with Donut-Shaped Templates
Author*Yun-Na Tsai, Shao-Yun Fang (National Taiwan Univ. of Science and Tech., Taiwan)
Detailed information (abstract, keywords, etc)

R4-10 (Time: 14:48 - 14:50)
TitleOn Effective Usage of APR Tools for Display Driver IC Layout Generation
AuthorKai-Liang Liang, Li-Yu Lin, *Hung-Ming Chen (NYCU, Taiwan)
Detailed information (abstract, keywords, etc)

R4-11 (Time: 14:50 - 14:52)
TitlePolygon Fracturing Method Considering Maximum Size Limit
Author*Taiki Matsuzaki, Kunihiro Fujiyoshi, Tomohiko Hotta (Tokyo Univ. of Agri. and Tech., Japan)
Detailed information (abstract, keywords, etc)

R4-12 (Time: 14:52 - 14:54)
TitlePin Access-Aware Power Distribution Network Optimization in 7nm Technology
AuthorWei-Shou Wu, *Rung-Bin Lin (Yuan Ze Univ., Taiwan)
Detailed information (abstract, keywords, etc)

R4-13 (Time: 14:54 - 14:56)
TitleAnomaly Classification with Anomaly-Focused Patch Selection by Gaussian Distribution
Author*Yuga Ono, Lin Meng (Ritsumeikan Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-14 (Time: 14:56 - 14:58)
TitleArchitecture of an FPGA-Based Brain Neural Network Simulator Using Direct Mapping
AuthorHasitha Muthumala Waidyasooriya, *Mizuki Harasawa, Masanori Hariyama (Tohoku Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-15 (Time: 14:58 - 15:00)
TitleCODEC system using EG2C chips and power control with a sleep mode for a visual prosthesis
Author*Naoya Tanaka, Shogo Hirayama, Yoshinori Takeuchi (Kindai Univ., Japan)
Detailed information (abstract, keywords, etc)

R4-16 (Time: 15:00 - 15:02)
TitleHybrid Refinement Strategy for Package Substrate Routing
AuthorTsubasa Koyama, *Ding-Hsun Lin, Yu-Jen Chen (National Tsing Hua Univ., Taiwan), Keng-Tuan Chang, Chih-Yi Huang, Chen-Chao Wang (Advanced Semiconductor Engineering (ASE), Taiwan), Tsung-Yi Ho (Chinese Univ. of Hong Kong, Taiwan)
Detailed information (abstract, keywords, etc)