| Title | (Invited Paper) Logic and Memory Design using Spin-based Circuits |
| Author | *Zhaoxin Liang, Meghna Mankalale, Brandon Del Bel, Sachin S. Sapatnekar (University of Minnesota, U.S.A.) |
| Page | pp. 103 - 108 |
| Keyword | Spintronics, All-spin logic, ASL, MTJ, error correction |
| Abstract | The design of logic and memory circuits in emerging spintronics technology offers fertile ground for new ideas and innovations. We first describe methods for optimizing spintronic logic circuits at the level of physical design, including systematic approaches for building standard cell libraries to enable the design of large circuits. Next, we examine issues in the design of spintronic memories and present methods that trade off volatility with error correction to build dense memory arrays. |
| Title | (Invited Paper) Architecture Design with STT-RAM: Opportunities and Challenges |
| Author | Ping Chi, Shuangchen Li, Yuanqing Cheng (University of California at Santa Barbara, U.S.A.), Yu Lu, Seung H. Kang (Qualcomm Incorporated, U.S.A.), *Yuan Xie (University of California at Santa Barbara, U.S.A.) |
| Page | pp. 109 - 114 |
| Keyword | STT-RAM, cache design, memory design |
| Abstract | The emerging STT-RAM has attracted a lot of interest from both academia and industry in recent years. It has been considered as a promising replacement of SRAM and DRAM in the cache and memory system design thanks to many advantages. However, the disadvantages of STT-RAM also bring design challenges. This paper introduces state-of-the-art architectural approaches to adopt STT-RAM in the cache and memory system design by taking advantage of the opportunities brought by STT-RAM as well as overcoming the challenges. |
| Title | (Invited Paper) Prospects of Efficient Neural Computing with Arrays of Magneto-metallic Neurons and Synapses |
| Author | Abhronil Sengupta, Karthik Yogendra, Deliang Fan, *Kaushik Roy (Purdue University, U.S.A.) |
| Page | pp. 115 - 120 |
| Keyword | Neuromorphic Computing, Spintronics |
| Abstract | Non-von Neumann computing models, like Artificial and Spiking Neural Networks, inspired from the functionalities of the human brain, would require devices that can offer a direct mapping to the underlying neuroscience mechanisms for energy-efficient and compact hardware implementation. To that effect, spin-transfer torque phenomena in devices based on lateral spin valves, domain wall motion in magnets and magnetic tunnel junctions can potentially pave the way for spintronic neural computing systems, where spintronic neurons interfaced with spintronic synapses, can directly mimic biological neural and synaptic functionalities. We explore various device structures suitable for such non-Boolean functionalities and demonstrate the potential benefits of such neural computing based on arrays of magneto-metallic neurons and synapses. |