| Title | Automatic Abstraction Refinement of TR for PDR |
| Author | Kuan Fan, *Ming-Jen Yang, Chung-Yang (Ric) Huang (National Taiwan Univ., Taiwan) |
| Page | pp. 121 - 126 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Complete Approach to Unreachable State Diagnosability via Property Directed Reachability |
| Author | *Ryan Berryhill, Andreas Veneris (Univ. of Toronto, Canada) |
| Page | pp. 127 - 132 |
| Detailed information (abstract, keywords, etc) | |
| Title | Formally Analyzing Fault Tolerance in Datapath Designs using Equivalence Checking |
| Author | Payman Behnam (Univ. of Tehran, Iran), Bijan Alizadeh (Univ. of Tehran, and IPM, Iran), Sajjad Taheri (Univ. of Tehran, Iran), *Masahiro Fujita (Univ. of Tokyo, Japan) |
| Page | pp. 133 - 138 |
| Detailed information (abstract, keywords, etc) | |
| Title | Coupling Reverse Engineering and SAT to Tackle NP-Complete Arithmetic Circuitry Verification in ~O(# of gates) |
| Author | *Yi Diao, Xing Wei (Easy-Logic Technology, Hong Kong), Tak.Kei Lam (Chinese Univ. of Hong Kong, Hong Kong), Yu.Liang Wu (Easy-Logic Technology, Hong Kong) |
| Page | pp. 139 - 146 |
| Detailed information (abstract, keywords, etc) | |